Pipelined RISC-V Computer Architecture

Start at a single logic gate and finish able to explain how a pipelined processor executes your C code.

This book never skips a layer. You build combinational blocks into an arithmetic logic unit, add flip-flops and timing constraints, design finite state machines, and model all of it in a hardware description language with testbenches. Then you meet the instruction set: register formats, encodings, assembly control flow, procedures and the stack, and the exact path from C source through compiler and linker to memory.

From there you construct a single-cycle datapath, pipeline it, resolve data and control hazards with forwarding and stalls, and measure the result. Caches, virtual memory, multicore parallelism and device input and output close the book. Every chapter connects the abstract model to the concrete hardware, so you always know which layer you are standing on and why the next one matters.

What you will learn:

• Convert between number systems and represent signed and unsigned values in binary
• Apply Boolean algebra to simplify expressions and build logic gates
• Combine gates into adders, multiplexers, decoders and other combinational blocks
• Use flip-flops, clocks and timing constraints to create reliable sequential logic
• Design finite state machines and implement them in a hardware description language with testbenches
• Read and write RISC-V assembly, including control flow, procedures and stack discipline
• Trace the path from C source through compiler and linker to machine code in memory
• Construct a single-cycle datapath and then pipeline it with forwarding and stalls
• Evaluate branch prediction, caches, virtual memory, parallelism and input-output

For computer engineering students and self-taught systems programmers who want a complete, hands-on path from digital logic to a working pipelined RISC-V processor. If you have basic programming experience and are ready to understand the hardware-software interface from the ground up, this book is for you.